Synopsys accelerates multi-die designs with the industry’s first complete HBM3 IP and authentication solutions





HBM3 IP solution delivers maximum memory bandwidth of 921 GB/s for high-performance computing, AI and graphics SoCs

MOUNTAIN VIEW, California., Oct 7 2021 /PRNewswire/ —

Highlights of this announcement:

  • The DesignWare HBM3 controller, PHY and authentication IP reduce integration risk and maximize memory performance in 2.5D multi-die systems

  • Low-latency HBM3 controller and flexible configuration options improve memory bandwidth

  • Pre-hardened or configurable HBM3 PHY in 5-nm process operates at 7200 Mbps for up to 2x the data rate and improves energy efficiency by up to 60% compared to HBM2E

  • Authentication IP and memory models for ZeBu and HAPS provide an end-to-end solution for fast authentication closure from IP to SoC

  • Synopsys’ 3DIC Compiler, an integrated multi-die design and analysis platform, provides a comprehensive HBM3 auto-routing solution for fast and robust design development

Synopsys, Inc. (Nasdaq: SNPS) today announced the industry’s first complete HBM3 IP solution, including controller, PHY and authentication IP for 2.5D multi-die packet systems. HBM3 technology helps designers meet essential high-bandwidth, low-power memory requirements for system-on-chip (SoC) designs targeting high-performance computing, AI, and graphics applications. Synopsys’ DesignWare® HBM3 controller and PHY IP, built on silicon-proven HBM2E IP, leverages Synopsys’ interposer expertise to provide a low-risk solution that enables high memory bandwidth up to 921 GB/s.

Synopsys’ authentication solution, including authentication IP with built-in coverage and authentication plans, out-of-the-box HBM3 memory models for ZeBu® emulation, and HAPS® prototyping system, accelerates authentication from HBM3 IP to SoCs. To accelerate the development of HBM3 system designs, Synopsys’ 3DIC Compiler multi-die design platform provides a fully integrated solution for system-level architectural exploration, implementation, and analysis.

Synopsys’ DesignWare HBM3 Controller IP supports a variety of HBM3-based systems with flexible configuration options. The controller minimizes latency and optimizes data integrity with advanced remote access features including error correction code, refresh management and parity.

The DesignWare HBM3 PHY IP in 5-nm process, available as pre-hardened or customer-configurable PHY, operates at up to 7200 Mbps per pin, dramatically improves power efficiency, and supports up to four active operating states enabling dynamic frequency scaling. The DesignWare HBM3 PHY uses an optimized microbump array to minimize surface area. The support for intermediate track lengths gives designers more flexibility in PHY placement without impacting performance.

Synopsys Verification IP for HBM3 uses the next-generation native SystemVerilog Universal Verification Methodology architecture to facilitate integration of existing authentication environments and run a greater number of tests, speeding up time to first test. The out-of-the-box HBM3 memory models for ZeBu emulation and HAPS prototyping system enable RTL and software verification for higher levels of performance.

“Synopsys continues to meet the design and authentication requirements of data-intensive SoCs with high-performance memory interface IP and authentication solutions for the most advanced protocols such as HBM3, DDR5 and LPDDR5,” said John Koeter, senior vice president of marketing and strategy for IP at Synopsys. “The complete HBM3 IP and authentication solutions enable designers to meet increasing bandwidth, latency and power requirements while accelerating authentication termination, all from a single, trusted provider.”

Synopsys’ broad DesignWare IP portfolio includes logic libraries, embedded memories, PVT sensors, embedded test, analog IP, interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development, and integration of IP into SoCs, Synopsys’ IP Accelerated initiative offers IP prototyping kits, IP software development kits, and IP subsystems. Our comprehensive investment in IP quality and comprehensive technical support enable designers to reduce integration risk and accelerate time to market. For more information, visit https://www.synopsys.com/designware.

Supporting quotes from customers and partners

“Micron is committed to providing the world’s most advanced computing systems with the industry’s best performing solutions. HBM3 will deliver the memory bandwidth essential to enable the next generation of high-performance computing and artificial intelligence systems,” said Mark Montierth, Micron vice president and general manager of High-Performance Memory and Networking. “Our partnership with Synopsys will accelerate ecosystem development for ultra-high bandwidth, energy-efficient HBM3 products with unprecedented performance.”

“The data-driven era of computing and the evolution of AI, HPC, graphics, and other applications have exponentially increased memory bandwidth requirements,” he said. Kwagil Park, senior vice president of Memory Product Planning at Samsung Electronics. “As the world’s leading memory chip manufacturer, Samsung is constantly focused on supporting ecosystem readiness and developing HBM to meet growing bandwidth requirements for all applications. Synopsys is an ecosystem pioneer in the HBM industry and a valued partner. We look forward to continuing to deliver the best HBM performance to our customers.”

“SK hynix, a leading global semiconductor manufacturer, continues to invest in the development of next-generation memory technologies, including HBM3 DRAMs, to meet the exponential growth of workloads for AI and graphics applications,” he said. Cheol Kyu Park, Vice President, HBM Product Champion and Head of DRAM Product Engineering at SK hynix. “We will leverage our longstanding relationship with Synopsys to provide our mutual customers with fully tested and interoperable HBM3 solutions that can maximize memory performance, capacity and throughput.”

“Socionext, a global leader in SoC solutions, along with Synopsys, a leading industry partner, provide comprehensive solutions to our customers in a wide variety of markets,” said Yutaka Hayashi, vice president of Data Center & Networking Business Unit at Socionext. “Our recent partnership with Synopsys, leveraging Synopsys’ HBM2E IP on 5-nm process and integrated full-system multi-die design platform, will expand with the new DesignWare HBM3 IP and authentication solutions, enabling our customers to higher memory performance and capacity in SoCs that require the upcoming HBM3 specification.”

Availability and Resources

The Synopsys DesignWare HBM3 controller, PHY and Verification IP, as well as the ZeBu emulation memory model, HAPS prototyping system and 3DIC compiler are now available.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As an S&P 500 company, Synopsys has a long history as a global leader in electronic design automation (EDA) and semiconductor IP, offering the broadest portfolio of application security testing tools and services. Whether you’re a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing more secure, high-quality code, Synopsys has the solutions needed to deliver innovative products. Learn more at www.synopsys.com.

Editorial contact:
Simone Souza
Synopsys, Inc.
650-584-6454
simone@synopsys.com

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SOURCE Synopsys, Inc.




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